View ICS843021AGI-01_4934885.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

843021agi-01 www.icst.com/products/hiperclocks.html rev. a november 30, 2004 1 integrated circuit systems, inc. ics843021i-01 f emto c locks ? c rystal - to -3.3v, 2.5v 125mh z lvpecl c lock g enerator preliminary g eneral d escription the ics843021i-01 is a gigabit ethernet clock generator and a member of the hiperclocks tm family of high performance devices from ics. the ics843021i-01 uses a 25mhz crystal to synthesize 125mhz. the ics843021i-01 has excellent phase jitter performance, over the 1.875mhz ? 20mhz integration range. the ics843021i-01 is packaged in a small 8-pin tssop, making it ideal for use in systems with limited board space. f eatures ? 1 differential 3.3v lvpecl output ? crystal oscillator interface designed for 25mhz, 18pf parallel resonant crystal ? output frequency: 125mhz, using a 25mhz crystal ? vco range: 490mhz - 640mhz ? rms phase jitter @ 125mhz, using a 25mhz crystal (1.875mhz - 20mhz): 0.41ps (typical) (for 3.3v) ? full 3.3v or 2.5v operating supply ? -40c to 85c ambient operating temperature hiperclocks? ics ics843021i-01 8-lead tssop 4.40mm x 3.0mm x 0.925mm package body g package top view v cc xtal_out xtal_in v ee 1 2 3 4 q0 nq0 v cc oe 8 7 6 5 b lock d iagram p in a ssignment osc phase detector vco 4 (fixed) 20 (fixed) xtal_in xtal_out q0 nq0 25mhz oe the preliminary information presented herein represents a product in prototyping or pre-production. the noted characteristics a re based on initial product characterization. integrated circuit systems, incorporated (ics) reserves the right to change any circuitry or specific ations without notice.
843021agi-01 www.icst.com/products/hiperclocks.html rev. a november 30, 2004 2 integrated circuit systems, inc. ics843021i-01 f emto c locks ? c rystal - to -3.3v, 2.5v 125mh z lvpecl c lock g enerator preliminary t able 2. p in c haracteristics t able 1. p in d escriptions r e b m u ne m a ne p y tn o i t p i r c s e d 6 , 1v c c r e w o p. n i p y l p p u s e r o c 3 , 2 , t u o _ l a t x n i _ l a t x t u p n i . t u p t u o e h t s i t u o _ l a t x , t u p n i e h t s i n i _ l a t x . e c a f r e t n i r o t a l l i c s o l a t s y r c 4v e e r e w o p. n i p y l p p u s e v i t a g e n 5e ot u p n ip u l l u p d n a d e l b a n e e r a s t u p t u o e h t , h g i h c i g o l n e h w . e l b a n e t u p t u o h g i h e v i t c a h g i h a n i e r a d n a d e l b a s i d e r a s t u p t u o e h t , w o l c i g o l n e h w . e v i t c a . s l e v e l e c a f r e t n i l t t v l / s o m c v l . e t a t s e c n a d e p m i 8 , 70 q , 0 q nt u p t u o. s l e v e l e c a f r e t n i l c e p v l . s t u p t u o k c o l c l a i t n e r e f f i d p u l l u p . s e u l a v l a c i p y t r o f , s c i t s i r e t c a r a h c n i p , 2 e l b a t e e s . s r o t s i s e r t u p n i l a n r e t n i o t s r e f e r l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u c n i e c n a t i c a p a c t u p n i 4f p r p u l l u p r o t s i s e r p u l l u p t u p n i 1 5k ?
843021agi-01 www.icst.com/products/hiperclocks.html rev. a november 30, 2004 3 integrated circuit systems, inc. ics843021i-01 f emto c locks ? c rystal - to -3.3v, 2.5v 125mh z lvpecl c lock g enerator preliminary t able 3a. p ower s upply dc c haracteristics , v cc = 3.3v5%, t a = -40c to 85c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v c c e g a t l o v y l p p u s e r o c 5 3 1 . 33 . 35 6 4 . 3v v a c c e g a t l o v y l p p u s g o l a n a 5 3 1 . 33 . 35 6 4 . 3v i e e t n e r r u c y l p p u s r e w o p 0 6a m t able 3d. lvpecl dc c haracteristics , v cc = 3.3v5% or 2.5v5%, t a = -40c to 85c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v h o 1 e t o n ; e g a t l o v h g i h t u p t u ov c c 4 . 1 -v c c 9 . 0 -v v l o 1 e t o n ; e g a t l o v w o l t u p t u ov c c 0 . 2 -v c c 7 . 1 -v v g n i w s g n i w s e g a t l o v t u p t u o k a e p - o t - k a e p6 . 00 . 1v 0 5 h t i w d e t a n i m r e t s t u p t u o : 1 e t o n ? v o t c c . v 2 - a bsolute m aximum r atings supply voltage, v cc 4.6v inputs, v i -0.5v to v cc + 0.5v outputs, i o continuous current 50ma surge current 100ma package thermal impedance, ja 101.7c/w (0 mps) storage temperature, t stg -65c to 150c note: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these ratings are stress specifications only. functional operation of product at these conditions or any conditions be- yond those listed in the dc characteristics or ac character- istics is not implied. exposure to absolute maximum rating conditions for extended periods may affect product reliability. t able 3c. lvcmos/lvttl dc c haracteristics , v cc = 3.3v5% or 2.5v5%, t a = -40c to 85c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v h i e g a t l o v h g i h t u p n i 2v c c 3 . 0 +v v l i e g a t l o v w o l t u p n i 3 . 0 -8 . 0v i h i t n e r r u c h g i h t u p n ie ov c c v = n i v 5 . 2 r o v 5 6 4 . 3 =5a i l i t n e r r u c w o l t u p n ie ov c c v , v 5 . 2 r o v 5 6 4 . 3 = n i v 0 =0 5 1 -a t able 3b. p ower s upply dc c haracteristics , v cc = 2.5v5%, t a = -40c to 85c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v c c e g a t l o v y l p p u s e r o c 5 7 3 . 25 . 25 2 6 . 2v v a c c e g a t l o v y l p p u s g o l a n a 5 7 3 . 25 . 25 2 6 . 2v i e e t n e r r u c y l p p u s r e w o p 7 5a m
843021agi-01 www.icst.com/products/hiperclocks.html rev. a november 30, 2004 4 integrated circuit systems, inc. ics843021i-01 f emto c locks ? c rystal - to -3.3v, 2.5v 125mh z lvpecl c lock g enerator preliminary t able 5a. ac c haracteristics , v cc = 3.3v5%, t a = -40c to 85c t able 4. c rystal c haracteristics r e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u n o i t a l l i c s o f o e d o m l a t n e m a d n u f y c n e u q e r f 5 2z h m ) r s e ( e c n a t s i s e r s e i r e s t n e l a v i u q e 0 5 ? e c n a t i c a p a c t n u h s 7f p l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u f t u o y c n e u q e r f t u p t u o 5 2 1z h m t ) ? ( t i j ; ) m o d n a r ( r e t t i j e s a h p s m r 1 e t o n : e g n a r n o i t a r g r e t n i z h m 0 2 - z h m 5 7 8 . 1 1 4 . 0s p t r t / f e m i t l l a f / e s i r t u p t u o% 0 8 o t % 0 20 0 4s p c d oe l c y c y t u d t u p t u o 0 5% . n o i t c e s s i h t g n i w o l l o f t o l p e s i o n e s a h p e h t o t r e f e r e s a e l p : 1 e t o n t able 5b. ac c haracteristics , v cc = 2.5v5%, t a = -40c to 85c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u f t u o y c n e u q e r f t u p t u o 5 2 1z h m t ) ? ( t i j ; ) m o d n a r ( r e t t i j e s a h p s m r 1 e t o n : e g n a r n o i t a r g r e t n i z h m 0 2 - z h m 5 7 8 . 1 2 4 . 0s p t r t / f e m i t l l a f / e s i r t u p t u o% 0 8 o t % 0 20 0 4s p c d oe l c y c y t u d t u p t u o 0 5% . n o i t c e s s i h t g n i w o l l o f t o l p e s i o n e s a h p e h t o t r e f e r e s a e l p : 1 e t o n
843021agi-01 www.icst.com/products/hiperclocks.html rev. a november 30, 2004 5 integrated circuit systems, inc. ics843021i-01 f emto c locks ? c rystal - to -3.3v, 2.5v 125mh z lvpecl c lock g enerator preliminary t ypical p hase n oise at 125mh z (3.3v or 2.5v) 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 -170 -180 -190 100 1k 10k 100k 1m 10m 100m 125mhz rms phase jitter (random) 1.875mhz to 20mhz (3.3v) = 0.41ps (typical) 1.875mhz to 20mhz (2.5v) = 0.42ps (typical) o ffset f requency (h z ) n oise p ower dbc hz ? ? ? gigabit ethernet filter raw phase noise data phase noise result by adding gigabit ethernet filter to raw data
843021agi-01 www.icst.com/products/hiperclocks.html rev. a november 30, 2004 6 integrated circuit systems, inc. ics843021i-01 f emto c locks ? c rystal - to -3.3v, 2.5v 125mh z lvpecl c lock g enerator preliminary p arameter m easurement i nformation rms p hase j itter o utput r ise /f all t ime 3.3v o utput l oad ac t est c ircuit scope qx nqx lvpecl 2v -1.3v 0.165v clock outputs 20% 80% 80% 20% t r t f v swing pulse width t period t pw t period odc = q0 nq0 v ee v cc 2.5v o utput l oad ac t est c ircuit phase noise mas k offset frequency f 1 f 2 phase noise plot rms jitter = area under the masked phase noise plot noise power o utput d uty c ycle /p ulse w idth /p eriod scope qx nqx lvpecl 2v -0.5v 0.125v v ee v cc
843021agi-01 www.icst.com/products/hiperclocks.html rev. a november 30, 2004 7 integrated circuit systems, inc. ics843021i-01 f emto c locks ? c rystal - to -3.3v, 2.5v 125mh z lvpecl c lock g enerator preliminary a pplication i nformation figure 1. c rystal i npu t i nterface c rystal i nput i nterface the ics843021i-01 has been characterized with 18pf parallel resonant crystals. the capacitor values, c1 and c2, shown in figure 1 below were determined using a 25mhz, 18pf parallel resonant crystal and were chosen to minimize the ppm error. the optimum c1 and c2 values can be slightly adjusted for different board layouts. t ermination for 3.3v lvpecl o utput the clock layout topology shown below is a typical termination for lvpecl outputs. the two different layouts mentioned are recommended only as guidelines. fout and nfout are low impedance follower outputs that generate ecl/lvpecl compatible outputs. therefore, terminat- ing resistors (dc current path to ground) or current sources must be used for functionality. these outputs are designed to f igure 2b. lvpecl o utput t ermination f igure 2a. lvpecl o utput t ermination drive 50 ? transmission lines. matched impedance techniques should be used to maximize operating frequency and minimize signal distortion. figures 2a and 2b show two different layouts which are recommended only as guidelines. other suitable clock layouts may exist and it would be recommended that the board designers simulate to guarantee compatibility across all printed circuit and clock component process variations. v cc - 2v 50 ? 50 ? rtt z o = 50 ? z o = 50 ? fout fin rtt = z o 1 ((v oh + v ol ) / (v cc ? 2)) ? 2 3.3v 125 ? 125 ? 84 ? 84 ? z o = 50 ? z o = 50 ? fout fin c1 27p x1 18pf parallel crystal c2 27p xtal_out xtal_in
843021agi-01 www.icst.com/products/hiperclocks.html rev. a november 30, 2004 8 integrated circuit systems, inc. ics843021i-01 f emto c locks ? c rystal - to -3.3v, 2.5v 125mh z lvpecl c lock g enerator preliminary t ermination for 2.5v lvpecl o utput figure 3a and figure 3b show examples of termination for 2.5v lvpecl driver. these terminations are equivalent to terminat- ing 50 ? to v cc - 2v. for v cc = 2.5v, the v cc - 2v is very close to ground level. the r3 in figure 3b can be eliminated and the termination is shown in figure 3c. f igure 3c. 2.5v lvpecl t ermination e xample f igure 3b. 2.5v lvpecl d river t ermination e xample f igure 3a. 2.5v lvpecl d river t ermination e xample r2 62.5 zo = 50 ohm r1 250 + - 2.5v 2,5v lvpecl driv er r4 62.5 r3 250 zo = 50 ohm 2.5v vcc=2.5v r1 50 r3 18 zo = 50 ohm zo = 50 ohm + - 2,5v lvpecl driver vcc=2.5v 2.5v r2 50 2,5v lvpecl driv er vcc=2.5v r1 50 r2 50 2.5v zo = 50 ohm zo = 50 ohm + -
843021agi-01 www.icst.com/products/hiperclocks.html rev. a november 30, 2004 9 integrated circuit systems, inc. ics843021i-01 f emto c locks ? c rystal - to -3.3v, 2.5v 125mh z lvpecl c lock g enerator preliminary a pplication s chematic figure 4 shows an example of ics843021i-01 application schematic. in this example, the device is operated at v cc = 3.3v. the decoupling capacitor should be located as close as possible to the power pin. the input is driven by a 25mhz quartz crystal. for the lvpecl output drivers, only two termination examples are shown in this schematic. additional termination approaches are shown in the lvpecl termination application note. f igure 4. ics843021i-01 s chematic e xample r3 50 zo = 50 optional termination c4 .1uf c5 .1uf vcc = 3.3v zo = 50 ohm oe r5 133 x1 25mhz u1 843021i-01 1 2 3 4 8 7 6 5 vcc xta l _o u t xta l _i n vee q0 nqo vcc oe r3 133 r2 50 r1 50 r4 82.5 c2 27pf zo = 50 c1 27pf r6 82.5 zo = 50 ohm + - + - vcc 18pf c3 10uf 3.3v
843021agi-01 www.icst.com/products/hiperclocks.html rev. a november 30, 2004 10 integrated circuit systems, inc. ics843021i-01 f emto c locks ? c rystal - to -3.3v, 2.5v 125mh z lvpecl c lock g enerator preliminary p ower c onsiderations this section provides information on power dissipation and junction temperature for the ics843021i-01. equations and example calculations are also provided. 1. power dissipation. the total power dissipation for the ics843021i-01 is the sum of the core power plus the power dissipated in the load(s). the following is the power dissipation for v cc = 3.3v + 5% = 3.465v, which gives worst case results. note: please refer to section 3 for details on calculating power dissipated in the load. ? power (core) max = v cc_max * i ee_max = 3.465v * 60ma = 207.9mw ? power (outputs) max = 30mw/loaded output pair total power _max (3.465v, with all outputs switching) = 207.9mw + 30mw = 237.9mw 2. junction temperature. junction temperature, tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the device. the maximum recommended junction temperature for hiperclocks tm devices is 125c. the equation for tj is as follows: tj = ja * pd_total + t a tj = junction temperature ja = junction-to-ambient thermal resistance pd_total = total device power dissipation (example calculation is in section 1 above) t a = ambient temperature in order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance ja must be used. assuming a moderate air flow of 1 meter per second and a multi-layer board, the appropriate value is 90.5c/w per table 6 below. therefore, tj for an ambient temperature of 85c with all outputs switching is: 85c + 0.238w * 90.5c/w = 106.5c. this is well below the limit of 125c. this calculation is only an example. tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow , and the type of board (single layer or multi-layer). t able 6. t hermal r esistance ja for 8- pin tssop, f orced c onvection ja by velocity (meters per second) 0 1 2.5 multi-layer pcb, jedec standard test boards 101.7c/w 90.5c/w 89.8c/w
843021agi-01 www.icst.com/products/hiperclocks.html rev. a november 30, 2004 11 integrated circuit systems, inc. ics843021i-01 f emto c locks ? c rystal - to -3.3v, 2.5v 125mh z lvpecl c lock g enerator preliminary 3. calculations and equations. the purpose of this section is to derive the power dissipated into the load. lvpecl output driver circuit and termination are shown in figure 5. t o calculate worst case power dissipation into the load, use the following equations which assume a 50 ? load, and a termination voltage of v cc - 2v. for logic high, v out = v oh_max = v cc_max ? 0.9v (v cco_max - v oh_max ) = 0.9v for logic low, v out = v ol_max = v cc_max ? 1.7v (v cco_max - v ol_max ) = 1.7v pd_h is power dissipation when the output drives high. pd_l is the power dissipation when the output drives low. pd_h = [(v oh_max ? (v cc_max - 2v))/r l ] * (v cc_max - v oh_max ) = [(2v - (v cc _max - v oh_max )) /r l ] * (v cc_max - v oh_max ) = [(2v - 0.9v)/50 ? ] * 0.9v = 19.8mw pd_l = [(v ol_max ? (v cc_max - 2v))/r l ] * (v cc_max - v ol_max ) = [(2v - (v cc _max - v ol_max )) /r l ] * (v cc_max - v ol_max ) = [(2v - 1.7v)/50 ? ] * 1.7v = 10.2mw total power dissipation per output pair = pd_h + pd_l = 30mw f igure 5. lvpecl d river c ircuit and t ermination q1 v out v cc rl 50 v cc - 2v
843021agi-01 www.icst.com/products/hiperclocks.html rev. a november 30, 2004 12 integrated circuit systems, inc. ics843021i-01 f emto c locks ? c rystal - to -3.3v, 2.5v 125mh z lvpecl c lock g enerator preliminary r eliability i nformation t ransistor c ount the transistor count for ics843021i-01 is: 1765 t able 7. ja vs . a ir f low t able for 8 l ead tssop ja by velocity (meters per second) 0 1 2.5 multi-layer pcb, jedec standard test boards 101.7c/w 90.5c/w 89.8c/w
843021agi-01 www.icst.com/products/hiperclocks.html rev. a november 30, 2004 13 integrated circuit systems, inc. ics843021i-01 f emto c locks ? c rystal - to -3.3v, 2.5v 125mh z lvpecl c lock g enerator preliminary p ackage o utline - g s uffix for 8 l ead tssop t able 8. p ackage d imensions reference document: jedec publication 95, mo-153 l o b m y s s r e t e m i l l i m m u m i n i mm u m i x a m n8 a- -0 2 . 1 1 a5 0 . 05 1 . 0 2 a0 8 . 05 0 . 1 b9 1 . 00 3 . 0 c9 0 . 00 2 . 0 d0 9 . 20 1 . 3 ec i s a b 0 4 . 6 1 e0 3 . 40 5 . 4 ec i s a b 5 6 . 0 l5 4 . 05 7 . 0 0 8 a a a- -0 1 . 0
843021agi-01 www.icst.com/products/hiperclocks.html rev. a november 30, 2004 14 integrated circuit systems, inc. ics843021i-01 f emto c locks ? c rystal - to -3.3v, 2.5v 125mh z lvpecl c lock g enerator preliminary t able 9. o rdering i nformation while the information presented herein has been checked for both accuracy and reliability, integrated circuit systems, incorpor ated (ics) assumes no responsibility for either its use or for infringement of any patents or other rights of third parties, which would result from its use. no other circuits, patent s, or licenses are implied. this product is intended for use in normal commercial and industrial applications. any other applications such as those requiring high reliability or other extr aordinary environmental requirements are not recommended without additional processing by ics. ics reserves the right to change any circuitry or specifications without noti ce. ics does not authorize or warrant any ics product for use in life support devices or critical medical instruments. r e b m u n r e d r o / t r a pg n i k r a me g a k c a pt n u o ce r u t a r e p m e t 1 0 - i g a 1 2 0 3 4 8 s c i1 0 i a 1p o s s t d a e l 8e b u t r e p 0 0 1c 5 8 o t c 0 4 - t 1 0 - i g a 1 2 0 3 4 8 s c i1 0 i a 1l e e r d n a e p a t n o p o s s t d a e l 80 0 5 2c 5 8 o t c 0 4 - the aforementioned trademarks, hiperclocks? and femtoclocks? are a trademark of integrated circuit systems, inc. or its s ubsidiaries in the united states and/or other countries.

▲Up To Search▲

Price & Availability of ICS843021AGI-01

	To Download ICS843021AGI-01 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .